739 research outputs found

    Turn-on speed of grounded gate NMOS ESD protection transistors

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    The turn-on speed of nMOS transistors (nMOST) is of paramount importance for robust Charged Device Model (CDM) protection circuitry. In this paper the nMOST turn-on time has been measured for the first time in the sub-halve nanosecond range with a commercial e-beam tester. The method may be used to improve CDM-ESD hardness by investigating the CDM pulse responses within circuit. Furthermore it is shown that the CDM results of various protection layouts can be simulated with a SPICE model

    Generation of random mutants to improve light-use efficiency of Nannochloropsis gaditana cultures for biofuel production

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    Background The productivity of an algal culture depends on how efficiently it converts sunlight into biomass and lipids. Wild-type algae in their natural environment evolved to compete for light energy and maximize individual cell growth; however, in a photobioreactor, global productivity should be maximized. Improving light use efficiency is one of the primary aims of algae biotechnological research, and genetic engineering can play a major role in attaining this goal. Results In this work, we generated a collection of Nannochloropsis gaditana mutant strains and screened them for alterations in the photosynthetic apparatus. The selected mutant strains exhibited diverse phenotypes, some of which are potentially beneficial under the specific artificial conditions of a photobioreactor. Particular attention was given to strains showing reduced cellular pigment contents, and further characterization revealed that some of the selected strains exhibited improved photosynthetic activity; in at least one case, this trait corresponded to improved biomass productivity in lab-scale cultures. Conclusions This work demonstrates that genetic modification of N. gaditana has the potential to generate strains with improved biomass productivity when cultivated under the artificial conditions of a photobioreactor

    Al2O3 Surface Passivation Characterized on Hydrophobic and Hydrophilic c-Si by a Combination of QSSPC, CV, XPS and FTIR

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    Abstract In this work, the influence of the c-Si surface finishing (hydrophobic/hydrophilic) prior to the deposition of the Al2O3 passivation layer on the passivation quality is investigated. The samples are characterized by a combination of Quasi-Steady-State-PhotoConductance (QSSPC) Capacity-Conductance (CV), X-ray Photoelectron Spectroscopy (XPS) and Fourier Transformed InfraRed (FTIR) measurements. Furthermore, FTIR measurements are used to determine the thickness of interfacial SiOx layer

    Impact of sidewall etching on the dynamic performance of GaN-on-Si E-mode transistors

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    Abstract The aim of this paper is to investigate the role of the etching of the sidewalls of p-GaN on the dynamic performance of normally-off GaN HEMTs with p-type gate. We analyze two wafers having identical epitaxy but with different recipes for the sidewall etching, referred to as "Etch A" (non-optimized) and "Etch B" (optimized). We demonstrate the following relevant results: (i) the devices with non-optimized etching (Etch A), when submitted to positive gate bias, show a negative threshold voltage shift and a decrease in Ron, which are ascribed to hole injection under the gate and/or in the access regions; (ii) transient characterization indicates the existence of two trap states, with activation energies of 0.84 eV (CN defects) and 0.30 eV. The latter (with time-constants in the ms range) is indicative of the hole de-trapping process, possibly related to trap states in the AlGaN barrier or at the passivation/AlGaN interface; (iii) by optimizing the p-GaN sidewall etching (for the same epitaxy) it is possible to completely eliminate the threshold voltage shift. This indicates that hole injection mostly takes place along the sidewalls

    Characterization of charge trapping mechanisms in GaN vertical Fin FETs under positive gate bias

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    In this paper, we present a comprehensive analysis of the charge trapping mechanisms that affect the GaN based vertical Fin FETs when the devices are submitted to positive gate bias. Devices with higher channel width show lower threshold voltage: with 2D simulations of the electron density we are able to explain the phenomenon and propose a trade-off to improve the technology. By using double pulse measurements and threshold voltage transients, two trapping/detrapping mechanisms under positive gate bias can be identified according to two voltage ranges. At low positive gate bias, electrons (previously trapped inside the oxide during the fabrication process) are detrapped towards the gate metal (mechanism 1). At higher gate bias, electrons are trapped at the GaN/oxide interface, moving the threshold towards positive values (mechanism 2). The second mechanism is observable at higher time of stress and it is predominant for higher voltages. Moreover, mechanism 2 is found to be recoverable only when the device is exposed to UV-light and electrons trapped in a specific level in the oxide acquire the energy necessary to escape and reach the n-type GaN and/or the UV-generated holes accumulate at the interface may reduce the trapped electron density. We demonstrate our hypothesis by calculating the interface state density in trapping/detrapping conditions by using photo-assisted Capacitance-Voltage measurements

    Dynamic Behavior of Threshold Voltage and ID-VDS Kink in AlGaN/GaN HEMTs Due to Poole-Frenkel Effect

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    The kink effect in field-effect transistors (FETs) consists in a sudden increase in drain current, during a drain voltage sweep and leading to a higher drain current saturation value. We report new experimental data concerning the dynamic behavior of the "kink" in AlGaN/GaN HEMTs and correlate them with deep levels. The results demonstrate the role of the Poole-Frenkel effect in determining the occurrence of the kink and identify the experimental conditions that make it observable

    Failure Physics and Reliability of GaN-Based HEMTs for Microwave and Millimeter-Wave Applications: A Review of Consolidated Data and Recent Results

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    Herein, the results are reviewed concerning reliability of high-electron mobility transistors (HEMTs) based on GaN, which currently represent the technology of choice for high-efficiency microwave and millimeter-wave power amplifiers. Several failure mechanisms of these devices are extensively studied, including converse piezoelectric effects, formation of conductive percolation paths at the edge of gate toward the drain, surface oxidation of GaN, time-dependent breakdown of GaN buffer, and of field-plate dielectric. For GaN HEMTs with scaled gate length, the simultaneous control of short-channel effects, deep-level dispersion, and hot-electron-induced degradation requires a careful optimization of epitaxial material quality and device design
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